NASA’s New Space Chip Targets the Computing Gap Beyond Earth
It’s really difficult to command something we don’t have communication with, which is almost all of the time, says Steve Chien, NASA JPL Fellow and chief of artificial intelligence at NASA’s Jet Propulsion Laboratory. This limitation underpins the single most important piece of hardware that NASA is building a processor capable of providing spacecraft a much larger degree of autonomy in situations where distance, latency, and radiation preclude continuous human oversight. Developed via the High Performance Spaceflight Computing program in partnership with Microchip Technology, the chip serves as the onboard computer “brain” for mission applications requiring sensor data analytics, hazard identification, and control of complex systems independent of human commands received from Earth.
Space computing has always been about finding a middle ground. Traditional spacecraft processors can withstand harsh radiation exposure, but are painfully slow compared to contemporary standards, whereas commercial chips provide high performance, but are extremely sensitive to radiation and heat. NASA solves the issue through a system-on-a-chip design featuring CPUs, networking capability, memory, input/output functions, and computational accelerators in one unified system, subsequently hardening the design to resist radiation exposure.
On the programmatic level, HPSC can be characterized as a system-on-a-chip solution for next generation spacecraft, aimed at addressing the increasing discrepancy between the mission requirements and outdated flight computer capabilities. According to NASA, future exploration efforts will require autonomous capabilities, AI and machine learning algorithms, imagery analysis and recognition, and object detection capabilities, turning these tools from supplementary features into key functions for planetary landing vehicles, deep space probes, crew habitats, and robots functioning at distances that rule out real-time command and control.
The radiation effect is the primary challenge facing designers and engineers developing space processors. The high energy of particles involved can cause bit flipping, corrupt memory and even put a spacecraft into safe mode. As NASA notes, traditional solutions include hardened latches, error correction codes and memory, and even triple modular redundancy, which have been utilized in space since the earliest days of the industry. But while this problem is well-understood and can be addressed by proven means, what NASA attempts is adding an order of magnitude increase in performance to that mix.
During preliminary tests, the processor has proven to be many hundreds of times more capable compared to current radiation-hardened processors, according to NASA’s initial reports, or more than 100 times compared to conventional flight processors, based on the official description of the HPSC program. Regardless of the exact figures, this improvement points at one fundamental trend: spacecraft computers no longer have to transmit data back to Earth and await for instructions to arrive.
And the implications are quite clear, as NASA itself has already demonstrated the potential of onboard software in terms of identifying wildfires, floods, volcanoes, and other phenomena before receiving the data dump from sensors. During the agency’s Earth observation program, researchers have validated dozens of AI software algorithms for image processing, image analysis, and mission planning on space-suited advanced processors. The same can easily be applied to deep space and planetary exploration missions that might need to process image data and act in mere seconds.
Moreover, there is the context of the industry as a whole: Nvidia is working towards AI-capable chips to be used aboard orbiting platforms, signaling that spaceborne computer architecture is undergoing a major paradigm shift, focused on analyzing data on site rather than transmitting everything back to Earth. While NASA’s processor project is specifically mission-oriented, this general approach is common.
By 2024, HPSC was through the critical design review, tape-out happened in 2025, and in early 2026, the prototype successfully sent “Hello Universe” email as part of its validation testing efforts. The processor did not make the spacecraft any smarter on its own. But the trend it represents sure did.
